Knapsack: A Zero-Cycle Memory Hierarchy Component

The widening gap between processors and memory necessitates the development of novel memory hierarchies: hierarchies that can possibly service memory references at register speeds, since service at cache speeds may not be adequate. We consider the design of a novel memory hierarchy component, a knapsack, whose purpose is to provide (very) fast access to frequently-used data objects. Software allocates frequently-used objects into a knapsack region of the address space; a knapsack provides fast access (at register speeds in many cases) to these objects. We discuss how a knapsack is diierent from other memory hierarchy components, how it can achieve superior performance over other components, and how it can be integrated transparently into an implementation of existing architectures. We also carry out a detailed evaluation of a knapsack using several of the SPEC92 benchmark programs. Our results show that for many programs, both numeric and non-numeric, the knapsack ooers signiicant opportunity for memory access optimization. Using a prooler-based packing heuristic which can allocate both globals and locals to the knapsack region, we found that a knapsack as small as 4k bytes could service a signiicant number of memory references for many of our benchmark programs.